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==Comments== |
==Comments== |
Latest revision as of 07:36, 15 November 2011
Use this page to discuss script 2091 verilog: Verilog HDL/SystemVerilog HDVL indent file
- Add constructive comments, bug reports, or discuss improvements (see the guideline).
- Do not document the script here (the author should do that on vim.org).
- This page may be out of date: check the script's vim.org page above, and its release notes.